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نویسنده: سمانه بابایان مشهدی

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موارد یافت شده: 8

1 - A 5.3-9.3 fJ/Conversion-Step 4-32 MS/s 10 bit Asynchronous SAR ADC with Optimized DAC Timing Strategy in 0.13 μm CMOS (چکیده)
2 - Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator (چکیده)
3 - An offset cancellation technique for comparators using body-voltage trimming (چکیده)
4 - Analysis of Power in Dynamic Comparators (چکیده)
5 - Power Reduction Techniques in a 6 bit 1 GSPS Flash ADC (چکیده)
6 - An offset cancellation technique for comparators using body-voltage trimming (چکیده)
7 - Automating the Design of Ultra-Low-Voltage, Low-Power Analog Integrated Circuits using Improved Non-dominated Sorting Genetic Algorithm (چکیده)
8 - Establishing Financial Market in Iran (چکیده)